{"id":4389,"date":"2014-01-16T07:00:41","date_gmt":"2014-01-16T15:00:41","guid":{"rendered":"http:\/\/formtek.com\/blog\/?p=4389"},"modified":"2013-12-17T13:52:21","modified_gmt":"2013-12-17T21:52:21","slug":"moores-law-intel-struggles-to-keep-the-law-alive","status":"publish","type":"post","link":"https:\/\/formtek.com\/blog\/moores-law-intel-struggles-to-keep-the-law-alive\/","title":{"rendered":"Moore’s Law: Intel Struggles to Keep the Law Alive"},"content":{"rendered":"

Moore’s law<\/a> estimates that the number of transistors on an integrated circuit will double every two years. \u00a0The law has proved itself true for nearly forty years, and has driven during that time remarkable advances<\/a> in information technology. \u00a0By one estimate, 40 percent of global productivity growth achieved over the last 20 years was due to improvements in semiconductors and the accompanying growth in information and communication technologies.<\/p>\n

But now some think that Moore’s Law is now approaching a limit that will throw up a roadblock to future miniaturization of electronics.<\/p>\n

A recent\u00a0McKinsey report found<\/a>\u00a0that “recent developments indicate that the economics of continued miniaturization could break down as cost-per-transistor reductions flatten for nodes with feature sizes below 28nm…\u00a0A McKinsey analysis shows that moving from 32nm to 22nm nodes on 300-millimeter (mm) wafers causes typical fabrication costs to grow by roughly 40 percent. It also boosts the costs associated with process development by about 45 percent and with chip design by up to 50 percent. These dramatic increases will lead to process-development costs that exceed $1 billion for nodes below 20nm. In addition, the state-of-the art fabs needed to produce them will likely cost $10 billion or more. As a result, the number of companies capable of financing next-generation nodes and fabs will likely dwindle.”<\/p>\n

Brian Krzanich<\/a>,\u00a0Intel CEO, took exception and\u00a0said that<\/a> we\u00a0will “not take our foot off the pedal” of process technology. Krzanich\u00a0expects Intel transistors to stay on track to reach sizes as small as 10 nanometers by 2015, versus today\u2019s 22-nanometer parts.<\/p>\n

But some reports are showing that Intel is struggling to keep up the pace of miniaturization. \u00a0In a report for analysts last November, William Holt<\/a>, Executive Vice President of Manufacturing at Intel, reported that defect problems were delaying Intel’s plans for achieving 14-nanometer production. \u00a0Holt said that<\/a> “it\u2019s the first time in quite a number of generations… It\u2019s just getting really hard… \u00a0As hard as it is, it\u2019s going to be just as hard for everybody else.”<\/p>\n

Intel is determined to achieve production at the 14-nanometer scale. \u00a0At that size, while production costs for processing wafers go up 27 percent, since the size of the chips shrink, the cost of each chip would actually\u00a0fall 29 percent. \u00a0Stacy Smith<\/a>, Intel\u2019s chief financial officer at Intel, said that \u00a0the cost per chip “is going down more than the capital intensity is going up. \u00a0This is the economic beauty of Moore\u2019s Law.”<\/p>\n

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Moore’s law estimates that the number of transistors on an integrated circuit will double every two years. \u00a0The law has proved itself true for nearly forty years, and has driven during that time remarkable advances in information technology. \u00a0By one…<\/span><\/p>\n

Read more ›<\/a><\/div>\n

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