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RISC-V: An Open-Source Challenger to x86, ARM Architectures

By Dick Weisinger

RISC-V is an open-source 32-bit chip architecture that provides a small and efficient processor architecture. It is an open-source instruction set that does not require a fee to use. The project started at UC Berkeley in 2010 and now has contributers and volunteers working on the project thoughout the world.

To gain access to and to use the RISC-V code, it is necessary to join RISC-V International. The number of members has grown from about 600 memebers at the start of 2020 to more than 2400 today. Estimates are that there will be more than 80 billion RISC-V chips on the market by 2025, nearly 14 percent of the entire CPU market.

Mark Himelstein, CTO at RISC-V, said that “many companies are taking advantage of RISC-V to create custom processors designed to handle the power and performance requirements of newer workloads for AI (artificial intelligence) and ML (machine learning), IoT (Internet of Things), and VR (virtual reality) and AR (augmented reality) applications.”

Zdenek Prikryl, CTO of Codasip, said that “we will see RISC-V in more and more designs and products. In other words, the adoption of RISC-V will keep growing. We are starting to see RISC-V in new domains now, such as HPC, server and even automotive, which means more advanced and robust designs. It’s not just about the embedded domain anymore. One day, and it’s not that far away, we will see the first mobile phone that is RISC-V-based. I’m not saying that other processor architectures will disappear, but RISC-V definitely will grab a significant market share from them.”

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